LCMXO2-1200HC-4TG144I IC FPGA 107 I/O 144TQFP

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ʻO ka ʻohana MachXO2 o ka mana haʻahaʻa haʻahaʻa, hikiwawe, non-volatile PLDs he ʻeono mau mea me nā densities mai 256 a 6864 Look-Up Tables (LUTs).Ma waho aʻe o ka LUT-based, haʻahaʻa haʻahaʻa programmable logic e pili ana kēia mau mea i ka Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), preengineered source synchronous I/O support, advanced configuration support e komo pū ana me ka hiki ʻelua-boota a me nā mana paʻakikī o nā hana maʻamau e like me ka mana SPI, ka mana I2 C a me ka manawa/counter.Hāʻawi kēia mau hiʻohiʻona i kēia mau mea hoʻohana i nā kumu kūʻai haʻahaʻa, nā mea kūʻai kiʻekiʻe a me nā noi ʻōnaehana.Hoʻolālā ʻia nā mea MachXO2 ma kahi kaʻina hana haʻahaʻa haʻahaʻa ʻole 65 nm.He nui nā hiʻohiʻona o ka hale hana e like me ka programmable haʻahaʻa haʻahaʻa haʻahaʻa I/Os a me ka hiki ke hoʻopau i nā panakō I/O, nā PLL on-chip a me nā oscillators me ka ikaika.Kōkua kēia mau hiʻohiʻona i ka hoʻokele ʻana i ka mana static a me ka ikaika e hopena i ka mana static haʻahaʻa no nā lālā āpau o ka ʻohana.Loaʻa nā polokalamu MachXO2 i nā mana ʻelua - nā mana haʻahaʻa haʻahaʻa (ZE) a me nā mea hana kiʻekiʻe (HC a me HE).Hāʻawi ʻia nā mea mana haʻahaʻa haʻahaʻa i ʻekolu mau māka wikiwiki -1, -2 a me -3, me -3 ka wikiwiki loa.Pēlā nō, hāʻawi ʻia nā mea hana kiʻekiʻe i ʻekolu mau māka wikiwiki: –4, –5 a me –6, me ka –6 ka wikiwiki loa.Loaʻa i nā mea HC kahi mea hoʻoponopono uila laina i loko e kākoʻo ana i nā volta hoʻolako VCC waho o 3.3 V a i ʻole 2.5 V. ʻO nā mea ZE a me HE wale nō e ʻae i ka 1.2 V ma ke ʻano o ka volta lako VCC waho.Me ka ʻokoʻa o ka mana lako uila nā ʻano ʻekolu o nā mea hana (ZE, HC a me HE) i kūpono i ka hana a paʻa pū kekahi me kekahi.Loaʻa nā MachXO2 PLDs ma kahi ākea o nā pūʻolo halogen-free holomua mai ka mālama ʻana i ka lewa 2.5 mm x 2.5 mm WLCSP a i ka 23 mm x 23 mm fpBGA.Kākoʻo nā mea ʻo MachXO2 i ka neʻe ʻana i loko o ka pūʻolo like.Hōʻike ka papa 1-1 i nā densities LUT, pūʻolo a me nā koho I/O, me nā ʻāpana koʻikoʻi ʻē aʻe.Ke kākoʻo nei ke kumu hoʻonaʻauao mua i hoʻokō ʻia ma ka ʻohana ʻohana MachXO2 i kahi ākea o nā kūlana interface, me ka LPDDR, DDR, DDR2 a me 7: 1 e hoʻohana ana no ka hōʻike I/Os.